It’s good times to be in the foundry business — at least if you are TSMC. The firm has announced plans for much higher capital expenditures than it originally forecast for this year. Originally, TSMC expected to spend ~$11B on CapEx improvements for 2019. Now, the company will spend between $14-$15B after allocating another $4B in cash to increased 7nm and 5nm production.
7nm accounted for 27 percent of TSMC’s quarterly revenue, with 10nm at 2 percent and 16nm at 22 percent. Nodes at or below 16nm accounted for 51 percent of the company’s revenue, while older nodes contributed 49 percent. According to TSMC, the increased production need on 7nm and 5nm is being driven principally by 5G deployment. Capex in 2020 is expected to be in the $14-15B dollar range as well. Here are some other comments and data from the call.
5nm EUV is in risk production, offering an 80 percent logic density gain and a 20 percent performance improvement over 7nm. This is in line with previous comments TSMC has made. 5nm initial adoption will apparently be driven by HPC and mobile, but no word on who the HPC customer might be. AMD is obviously one potential client, but far from the only one — with GlobalFoundries off the leading edge, TSMC is handling most of the HPC manufacturing for 7nm customers with Samsung possibly picking up the rest.
7nm EUV (7nm+) is in high volume production, with 15-20 percent density improvement compared with 7nm and “improved” power consumption (no figures given) compared with 7nm. Even if companies like AMD move to 7nm+, it wouldn’t be surprising if they choose to use the potential density improvements in other ways. When AMD moved to 12nm from 14nm at GF, for example, it didn’t actually change the size of its CPU design — it used the density improvement to provide additional space between features to boost clocks.
6nm is a follow-on to 7nm+. Design layout rules are said to be fully compatible with 7nm+, with a further 18 percent improvement to density. No word on any other improvements, but this node uses one more EUV layer than 7nm+. Risk production in Q1 2020, volume production before the end of the year. No customer announcements for this node yet.
According to TSMC, it’s allocating more capacity for 5nm because of broad-based overall portfolio growth. C.C. Wei, Vice-Chairman and CEO, told investors: “Six months ago, I believe what I said is we will be very careful and a little bit conservative in building the 5-nanometer capacity. Now we changed to be more aggressive in the 5-nanometer capacity buildup because of we — as I said, we work closely with customers in both — all the applications like a smartphone, HPC, now even IoT and automotive.” TSMC has just announced a new 7nm deployment in automotive, so it makes sense that the company would be the long-term evolution of the 5nm node for that market as well.
TSMC expects 5G smartphone sales to constitute a higher percentage of overall smartphone sales than it apparently expected earlier this year. In the QA portion of the call, the company confirmed it expects mid-teens adoption of 5G phones in 2020, compared with previous forecasts of a single-digit percentage of users. Given 5G’s absolutely abominable US performance thus far, I’m not sure the company should be counting on much as far as this country is concerned. Unless you live in the very heart of a downtown area with excellent line of sight to your intended antenna, 5G signal strength is bad. The fact that devices overheat in hot weather is also bad. The state of 5G as a whole is bad, and we’ve already got carriers surreptitiously admitting that unless you live in the downtown of a major city, your 5G performance might look an awful lot like your LTE performance.
TSMC claims that it’s seeing a huge demand for 5G, so I guess we’ll see how things play out. Perhaps businesses and early product adopters account for the difference. It also claims to have developed its own solutions for EUV, including a pellicle, suitable for 5nm insertion. Pellicles have been one of the major concerns about EUV insertion at the 5nm node, so if TSMC has solved that problem for good it’ll be great news.
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